LinoSPAD2 support

Last edited Samuel Burri, 11 February 2023

General documentation

Current software and firmware

The last software and firmware release package is release_2212.zip (100MB). The included software is only for this firmware release.

The Linux software does not need any driver, but permissions need to be set for the device. The cypress.rules files can be placed in /etc/udev/rules.d/ for this purpose. For Windows you have to install the WinUSB driver for the Cypress PID (Device 04b4:00f1) with the Zadig tool available from https://zadig.akeo.ie/.

Using Linux is strongly recommended.

Software

Changelog:

Alignment helper updated with intensity histogram and log scale option
Option to acquire a global timestamp with each acquisition window The timestamp is the value of a 64-bit counter at the start of the acquisition window. It is running with the module clock. This can help debugging (external) synchronization of the acquisition cycles.

Previous versions

2204 Changelog:

Alignment helper
Auto repeat and auto save options for TDC operations
TCP/IP ASCII remote control interface for most used commands
Support independent acquisition window synchronization control in TDC acquisition tab.

2106 Changelog:

Added parameters for command line operation:
-s “settingsFile” : loads a specific settings file
-r “resultsFile” : runs 1 acquisition, saves results to file and terminates
-h : display help
-v : display version
Acquisition cycles now refer to number of cycles over all active pixels (I.e. it is now 1 by default and old settings need to be divided by 4.)
Support pixel masking and asymmetric clock output depending on detected firmware version
Inital release

Firmware

A Xilinx JTAG programmer is recommended to program the SPI flash configuration memory. There is the s6flasher utility in the software package that can write the SPI flash through the regular LinoSPAD2 firmware.

To program the flash memory using the s6flasher tool follow the procedure below:

Connect and power up the FPGA board
Launch s6flasher
Load image (select .mcs)
Erase flash
Write image
Verify image (optional)

In case of failure (configuration done LED remains dark) the FPGA board can always be recovered using a JTAG programmer.

To program the SPI flash PROM with Xilinx Impact 14.7, use the .mcs file and select the S25FL128S SPI flash, data width 4. Note: Boards from ID #20 have the S25FL256S SPI flash

Changelog:

Added 64-bit counter to timestamp acquisition windows.

Previous versions

2204 Changelog:

New trigger signal dividers for added synchronization flexibility
Acquisition window synchronization is now independent from timestamp reset signal

2106 Changelog:

Add pixel masking functionality
Add asymmetric clock output functionality
Prepare support for self-update
Inital release

Hardware setup (refer to the hardware manual for pin locations):

The standard hardware package has voltage supply wires connected and labelled with the appropriate voltages. In case of doubt please verify with your EPFL contacts.

Place jumpers in the following locations:
- J13.1-3 and J13.7-8 (FX3 boot configuration)
- J9.1-2 (FPGA configuration flash)
- J4.1-2 and J5.1-2 (3.3V FPGA I/O for daughterboard)
- J22.1-2 (3.3V supply for daughterboard)
- J3.3-4 (2.5V FPGA Bank0 voltage, oscillator works from 1.8V to 3.3V)
Connect 5V main logic power to J1.
The voltages given hereafter are safe start values and can be increased for better performance.
Connect external voltage supplies:
- 1.8V chip internal logic to J23.1 (GND J23.2)
- 1.4V SPAD filter diode bias to J23.3 (GND J23.4) This is a clamp voltage for the diode in the pixel output filter.
- 28V SPAD bias to J23.5 (GND J23.6) Operation is possible up to 30V. The SPAD lifetime will be reduced with higher voltages and consequently higher currents through the SPADs.

The software and firmware pack contains the following:

mainstream - Standard software and firmware with 64 TDCs, histogram modules and simple counters
- mainstream/src - Software sources to be compiled using Qt Creator
- mainstream/fw/a_interleaved - Firmware for V1 motherboards with interleaved pixel connections
- mainstream/fw/b_continuous - Firmware for V2 motherboards with continuous pixel connections
counting - Counting software and firmware without TDCs, but advanced triggering and continuous counting (only release 2106)
- counting/src - Software sources to be compiled using Qt Creator
- counting/fw/a_interleaved - Firmware for V1 motherboards with interleaved pixel connections
s6flasher/src - Flash tool for self-programming of the FPGA SPI configuration flash

Interleaved daughterboard layout:

-------------------------------------------------
|  3                   oo                    4  |
|                                               |
|                       |                       |
|                       |                       |
|                                               |
|  2                                         1  |
-------------------------------------------------

Continuous daughterboard layout:

-------------------------------------------------
|  3                   oo                    4  |
|                                               |
|                     ____                      |
|                                               |
|                                               |
|  2                                         1  |
-------------------------------------------------

Old releases

release_2204.zip (35MB) previous release with new clocking/synchronization options release_2106.zip (45MB) with counting only firmware and software

Publications

- S. Burri, C. Bruschini, and E. Charbon:
“LinoSPAD: A Compact Linear SPAD Camera System with 64 FPGA-Based TDC Modules for Versatile 50 ps Resolution Time-Resolved Imaging,”
Instruments 2017, 1(1), 6; doi:10.3390/instruments1010006.

- S. Burri, H. Homulle, C. Bruschini, and E. Charbon:
“LinoSPAD: a time-resolved 256 x 1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second,”
Proc. SPIE, Optical Sensing and Detection IV, vol. 9899, 2016.